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? semiconductor components industries, llc, 2014 august, 2014 ? rev. 1 1 publication order number: ncp700c/d ncp700c 200 ma, ultra low noise, high psrr, bicmos rf ldo regulator noise sensitive rf applications such as power amplifiers in cell phones and precision instrumentation require very clean power supplies. the ncp700c is 200 ma ldo that provides the engineer with a very stable, accurate voltage with ultra low noise and very high power supply rejection ratio (psrr) suitable for rf applications. in order to optimize performance for battery operated portable applications, the ncp700c employs an advanced bicmos process to combine the benefits of low noise and superior dynamic performance of bipolar elements with very low ground current consumption at full loads offered by cmos. furthermore, in order to provide a small footprint for space constrained applications, the ncp700c is stable with small, low value capacitors and is available in a very small wdfn6 1.5 mm x 1.5 mm. features ? output voltage options: ? 4.5 v ? contact factory for other voltage options ? excellent line and load regulation ? ultra low noise (typ. 10 vrms) ? high psrr (typ 70 db @ 1 khz) ? stable with ceramic output capacitors as low as 1 f ? very low ground current (typ. 70 a @ no load) ? low disable mode current (max. 1 a) ? current limit protection ? thermal shutdown protection ? these devices are pb?free, halogen free/bfr free and are rohs compliant applications ? smartphones / pdas / palmtops / gps ? cellular telephones (power amplifier) ? noise sensitive applications (rf, video, audio) ? analog power supplies ? battery supplied devices ncp700c in en out byp gnd on off 6 4 2 1 3 figure 1. ncp700c typical application c out 1 f c noise 10 nf c in 1 f v in v out http://onsemi.com see detailed ordering and shipping information on page 12 o f this data sheet. ordering information wdfn6 case 511bj marking diagram pin connections x = specific device code m = date code = pb?free package x m 1 (top view) 1 2 3 6 5 4 out gnd byp in nc en
ncp700c http://onsemi.com 2 figure 2. simplified block diagram + - bandgap reference voltage current limit in en byp gnd out r pd pin function description pin no. pin name description 1 out regulated output voltage 2 gnd power supply ground 3 byp noise reduction pin. (connect 10 nf or 100 nf capacitor to gnd) 4 en enable pin: this pin allows on/off control of the regulator. to disable the device, connect to gnd. if this function is not in use, connect to vin. internal 5 m pull down resistor is connected between en and gnd. 5 n/c not connected 6 in input voltage maximum ratings rating symbol value unit input voltage in ?0.3 v to 6 v v chip enable voltage en ?0.3 v to v in +0.3 v noise reduction voltage byp ?0.3 v to v in +0.3 v v output voltage out ?0.3 v to v in +0.3 v v output short?circuit duration infinity maximum junction temperature t j(max) 150 c storage temperature range t stg ?55 to 150 c electrostatic discharge (note 1) human body model esd 2000 v machine model 200 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v tested per mil?std?883, method 3015 machine model method 200 v thermal characteristics rating symbol value unit package thermal resistance, wdfn6: (note 2) junction?to?ambient (note 3) package thermal characterization parameter, wdfn6: junction?to?lead (pin 2) (note 3) junction?to?board (note 3) ja jl2 jb 185 123 111 c /w 2. refer to application information for safe operating area 3. single component mounted on 1 oz, fr4 pcb with 645mm 2 cu area.
ncp700c http://onsemi.com 3 electrical characteristics v in = v out + 0.5 v or 2.5 v (whichever is greater), v en = 1.2 v, c in = c out = 1 f, c noise = 10 nf, i out = 1 ma, t j = ?40 c to 125 c, unless otherwise specified (note 4) parameter test conditions symbol min typ max unit regulator output input voltage range v in 2.5 ? 5.5 v output voltage accuracy t j = ?40 c to 125 c, v in = (v out + 0.5 v) to 5.5 v i out = 1 ma to 200 ma v out ?2.5% ? +2.5% v line regulation v in = (v out +0.5 v) to 5.5 v, i out = 1 ma v out / v in ? 1200 ? v/v load regulation i out = 0 ma to 200 ma v out / i out ? 1.0 ? v/ma dropout voltage (note 5) i out = 200 ma v out(nom) = 4.5 v v do ? 80 150 mv output current limit v out = v out(nom) ? 0.1 v i lim 200 310 470 ma output short circuit current v out = 0v i sc 205 320 490 ma ground current i out = 0 ma i out = 200 ma i gnd ? ? 70 75 110 130 a disable current v en = 0 v i dis ? 0.1 1 a power supply rejection ratio v in = v out +0.5 v, v out = 4.5 v, i out = 150 ma f = 100 hz psrr ? 66 ? db f = 1 khz ? 70 ? f = 10 khz ? 55 ? f = 100 khz ? 37 ? f = 1 mhz ? 26 ? output noise voltage f = 10 hz to 100 khz, i out = 150 ma, v out = 4.5 v c noise = 10 nf c noise = 100 nf v n ? ? 23 10 ? ? v rms turn?on time (note 6) i out = 150 ma, c noise = 10 nf t on ? 400 ? s enable threshold low high v th(en) ? 1.2 ? ? 0.4 ? v enable internal pull?down resistance (note 7) r pd 2.5 5 10 m thermal shutdown shutdown, temperature increasing t sdu ? 150 ? c reset, temperature decreasing t sdd ? 135 ? c operating junction temperature t j ?40 125 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. performance gu aranteed over the indicated operating temperature range by design and/or characterization tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. measured when the output voltage falls 100 mv below the nominal output voltage (nominal output voltage is the voltage at the output meas - ured under the condition v in = v out + 0.5 v). in the case of devices having the nominal output voltage v out = 1.8 v the minimum input to output voltage differential is given by the v in(min) = 2.5 v. 6. the turn?on time is the time from asserting the en to the point where output voltage reaches 98% nominal voltage level. 7. expected to disable the device when en pin is floating.
ncp700c http://onsemi.com 4 typical characteristics v out , output voltage change (mv) figure 3. load regulation i out , load current (ma) 0 50 100 150 200 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 t j = 125 c t j = 25 c t j = ?40 c t j = 85 c v in = 5.0 v c out = 1 f c noise = 10 nf v out , output voltage change (mv) figure 4. load regulation under light loads i out , load current (ma) 024 6 10 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 8 t j = 25 c v in = 5.0 v c out = 1 f c noise = 10 nf v out , output voltage change (%) figure 5. line regulation v in , input voltage (v) 5.0 5.1 5.2 5.4 5.5 1.0 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.8 ?1.0 5.3 t j = ?40 c t j = 85 c t j = 125 c t j = 25 c i out = 1 ma c out = 1 f c noise = 10 nf v out , output voltage change (%) figure 6. line regulation v in , input voltage (v) 5.0 5.1 5.2 5.4 5.5 1.0 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.8 ?1.0 5.3 i out = 200 ma c out = 1 f c noise = 10 nf t j = ?40 c t j = 25 c t j = 85 c t j = 125 c v out , output voltage change (%) figure 7. output voltage vs. temperature t j , junction temperature ( c) 2.0 i out = 1 ma i out = 200 ma ?40 ?20 0 20 40 60 80 100 120 v in = 5.0 v c out = 1 f c noise = 10 nf 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 v do , dropout voltage (mv) figure 8. dropout voltage vs. output current i out , output current (ma) 120 100 80 60 40 20 0 0 20 100 180 200 160 140 120 40 60 80 t j = ?40 c t j = 25 c t j = 125 c c out = 1 f c noise = 10 nf
ncp700c http://onsemi.com 5 typical characteristics figure 9. dropout voltage vs. temperature t j , junction temperature ( c) ?40 ?20 0 20 40 60 80 100 120 v do , dropout voltage (mv) 120 100 80 60 40 20 0 i out = 200 ma c out = 1 f c noise = 10 nf figure 10. ground pin current vs. input voltage v in , input voltage (v) 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 i gnd , ground pin current ( a) 95 90 85 80 75 70 65 60 i out = 100 a i out = 1 ma i out = 200 ma t j = 25 c c out = 1 f c noise = 10 nf i out , output current (ma) i gnd , ground pin current ( a) 95 90 85 80 75 70 65 60 0 25 100 175 200 150 125 50 75 figure 11. ground pin current vs. output current t j = 25 c v in = 5.0 v c out = 1 f c noise = 10 nf i gnd , ground pin current ( a) 95 90 85 80 75 70 65 60 t j , junction temperature ( c) ?40 ?20 0 20 40 60 80 100 120 figure 12. ground pin current vs. temperature v in = 5.0 v c out = 1 f c noise = 10 nf i out = 200 ma i out = 1 ma t j , junction temperature ( c) ?40 ?20 0 20 40 60 80 100 120 i dis , disable current ( a) 0.5 0.4 0.3 0.2 0.1 0 figure 13. disable ground pin current vs. temperature v en = 0 v c out = 1 f c noise = 10 nf v in = 5 v v in = 5.5 v i lim , output current (ma) 300 t j , junction temperature ( c) ?40 ?20 0 20 40 60 80 100 120 figure 14. output current limit vs. temperature 290 280 270 260 250 v in = 5.0 v c out = 1 f c noise = 10 nf short circuit limit output current limit
ncp700c http://onsemi.com 6 typical characteristics figure 15. psrr vs. frequency, v in ? v out = 1.0 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 75 ma 200 ma t j = 25 c c out = 1 f c noise = 10 nf figure 16. psrr vs. frequency, v in ? v out = 0.5 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 75 ma 200 ma t j = 25 c c out = 1 f c noise = 10 nf figure 17. psrr vs. frequency, v in ? v out = 0.25 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 75 ma 200 ma t j = 25 c c out = 1 f c noise = 10 nf figure 18. psrr vs. frequency, v in ? v out = 1.0 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 200 ma t j = 25 c c out = 1 f c noise = 100 nf figure 19. psrr vs. frequency, v in ? v out = 0.5 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 t j = 25 c c out = 1 f c noise = 100 nf 10 ma 200 ma figure 20. psrr vs. frequency, v in ? v out = 0.25 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 200 ma t j = 25 c c out = 1 f c noise = 100 nf
ncp700c http://onsemi.com 7 typical characteristics figure 21. psrr vs. frequency, v in ? v out = 1.0 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 200 ma t j = 25 c c out = 10 f c noise = 100 nf figure 22. psrr vs. frequency, v in ? v out = 0.25 v frequency (hz) 10 100 1k 10k 100k 1m 10m psrr (db) 80 70 60 50 40 30 20 10 0 10 ma 200 ma t j = 25 c c out = 10 f c noise = 100 nf figure 23. psrr vs. (v in ? v out ) v in ? v out , input to output pin voltage (v) 0 0.2 0.4 0.6 0.8 1 psrr (db) t j = 25 c i out = 10 ma c out = 1 f c noise = 10 nf 1 khz 10 khz 100 khz 1 mhz 80 70 60 50 40 30 20 10 0 figure 24. psrr vs. (v in ? v out ) v in ? v out , input to output pin voltage (v) 0 0.2 0.4 0.6 0.8 1 psrr (db) 80 70 60 50 40 30 20 10 0 t j = 25 c i out = 75 ma c out = 1 f c noise = 10 nf 100 khz 1 mhz 10 khz 1 khz figure 25. psrr vs. (v in ? v out ) v in ? v out , input to output pin voltage (v) 0 0.2 0.4 0.6 0.8 1 psrr (db) 80 70 60 50 40 30 20 10 0 t j = 25 c i out = 200 ma c out = 1 f c noise = 10 nf 100 khz 1 mhz 10 khz 1 khz figure 26. output noise vs. noise bypass capacitor c noise , noise bypass capacitor (nf) 10 100 1k 10k 100k 1m 10 hz to 100 khz rms output noise ( vrms) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 c noise = 10 nf c noise = 100 nf t j = 25 c v in = 5.0 v i out = 10 ma c out = 1 f integral noise, c noise = 10 nf: 10 hz ? 100 khz: 32 vrms 100 hz ? 100 khz: 24 vrms integral noise, c noise = 100 nf: 10 hz ? 100 khz: 14 vrms 100 hz ? 100 khz: 10 vrms
ncp700c http://onsemi.com 8 typical characteristics figure 27. output noise vs. noise bypass capacitor c noise , noise bypass capacitor (nf) 0 100 200 300 400 500 10 hz to 100 khz rms output noise ( vrms) 45 40 35 30 25 20 15 10 5 0 t j = 25 c v in = 5.0 v i out = 200 ma c out = 1 f figure 28. output noise vs. output capacitor c out , output capacitor ( f) 01015203040 10 hz to 100 khz rms output noise ( vrms) 45 40 35 30 25 20 15 10 5 0 52535 t j = 25 c v in = 5.0 v i out = 200 ma c noise = 100 nf figure 29. line transient response t, time ( s) 0 40 80 120 160 200 v out , output voltage (v) 4.510 4.505 4.500 4.495 4.490 4.485 4.480 v in , input voltage (v) 5.75 5.50 5.25 5.00 4.75 t j = 25 c i out = 30 ma c out = 1 f c noise = 100 nf dv in /dt = 1 v/ 1 s 5.5 v 5.0 v figure 30. load transient response t, time ( s) 0 80 160 240 320 400 v out , output voltage (v) 4.60 i out , output current (ma) 300 4.55 4.50 4.45 4.40 4.35 4.30 200 100 0 t j = 25 c v in = 5.0 v c out = 1 f c noise = 100 nf 150 ma 1 ma
ncp700c http://onsemi.com 9 typical characteristics figure 31. power?up t, time ( s) 0 400 800 1200 1600 v in , input voltage (v) 6 v out , output voltage (v) 5 5 4 3 2 1 0 4 3 2 1 0 ?1 t j = 25 c v en = v in i out = 0.5 ma c out = 1 f c noise = 10 nf figure 32. power?up / down t, time (ms) 0 100 200 300 400 v, voltage (v) 6 5 4 3 2 1 0 ?1 v out v in t j = 25 c v en = v in i out = 200 ma c out = 1 f c noise = 10 nf
ncp700c http://onsemi.com 10 typical characteristics v out , output voltage (v) t, time (ms) figure 33. turn?on response 04 8121620 5.0 6 v en , enable voltage (v) t a = 25 c, v in = 5.0 v, c out = 1 f i out = 30 ma 5.0 v c noise = 47 nf c noise = 100 nf c noise = 220 nf c noise = 10 nf 4.0 3.0 2.0 1.0 0 4 2 0 v out , output voltage (v) v in , input voltage (v) figure 34. output voltage vs. input voltage 0 1.0 2.0 3.0 5.0 6.0 4.0 5.0 4.0 3.0 2.0 1.0 0 t a = 25 c, c noise = 100 nf, c out = 1 f r load = 10 k i q , quiescent current ( a) v in , input voltage (v) figure 35. quiescent current vs. input voltage 0 1.0 2.0 3.0 4.0 80 70 60 50 40 30 20 10 0 5.0 t a = 25 c, c noise = 100 nf, c out = 1 f ja , junction?to?ambient thermal resistance ( c/w) pcb copper area (mm 2 ) figure 36. thermal resistance and maximum power dissipation vc. copper area (wdfn6) 0 100 200 300 400 450 500 400 350 300 250 200 150 100 50 600 700 800 p d(max) , t a = 25 c 2 oz cu thickness p d(max) , t a = 25 c 1 oz cu thickness ja , 2 oz cu thickness ja , 2 oz cu thickness 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 p d(max( , maximum power dissipation (w)
ncp700c http://onsemi.com 11 applications information general the ncp700c is a high performance 200 ma low dropout linear regulator. this device delivers excellent noise and dynamic performance consuming only 75 a (typ) quiescent current at full load, with the psrr of (typ) 82 db at 1 khz. excellent load transient performance and small package size makes the device ideal for portable applications. logic en input provides on/off control of the output voltage. when the en is low the device consumes as low as typically 0.1 a. access to the major contributor of noise within the integrated circuit ? bandgap reference is provided through the byp pin. this allows bypassing the source of noise by the noise reduction capacitor and reaching noise levels below 10 v rms . the device is fully protected in case of output short circuit condition and overheating assuring a very robust design. input capacitor requirements (c in ) it is recommended to connect a 1 f ceramic capacitor between in pin and gnd pin of the device. this capacitor will provide a low impedance path for unwanted ac signals or noise present on the input voltage. the input capacitor will also limit the influence of input trace inductances and power supply resistance during sudden load current changes. higher capacitances will improve the line transient response. output capacitor requirements (c out ) the ncp700c has been designed to work with low esr ceramic capacitors on the output. the device will also work with other types of capacitors until the minimum value of capacitance is assured and the capacitor esr is within the specified range. generally it is recommended to use 1 f or larger x5r or x7r ceramic capacitor on the output pin. noise bypass capacitor requirements (c noise ) the c noise capacitor is connected directly to the high impedance node. any loading on this pin like the connection of oscilloscope probe, or the c noise capacitor leakage will cause a voltage drop in regulated output voltage. the minimum value of noise bypass capacitor is 10 nf. values below 10 nf should be avoided due to possible t urn?on overshoot. particular value should be chosen based on the output noise requirements. larger values of c noise will improve the output noise and psrr but will increase the regulator t urn?on time. enable operation the enable function is controlled by the logic pin en. the voltage threshold of this pin is set between 0.4 v and 1.2 v. voltage lower than 0.4 v guarantees the device is off. voltage higher than 1.2 v guarantees the device is on. the ncp700c enters a sleep mode when in the off state drawing less than typically 0.1 a of quiescent current. the internal 5 m pull?down resistor (r pd ) assures that the device is turned off when en pin is not connected. the device can be used as a simple regulator without use of the chip enable feature by tying the en to the in pin. turn?on time the turn?on time of the regulator is defined as the time needed to reach the output voltage which is 98% v out after assertion of the en pin. this time is determined by the noise bypass capacitance c noise and nominal output voltage level v out according the following formula: t on [s] c noise [f] v out [v] 68 10 ?6 [a] (eq. 1) example: using c noise = 100 nf, v out = 3 v, c out = 1 f, t on 100 10 ?9 3 68 10 ?6 4.41 ms the turn?on time is independent of the load current and output capacitor c out . to avoid output voltage overshoot during turn?on please select c noise 10 nf. current limit output current is internally limited within the ic to a typical 310 ma. the ncp700c will source this amount of current measured with a voltage 100 mv lower than the typical operating output voltage. if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 320 ma (typ). the current limit and short circuit protection will work properly up to v in = 5.5 v at t a = 25 c. there is no limitation for the short circuit duration. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (t sdu ? 150 c typical), thermal shutdown event is detected and the output (v out ) is turned off. the ic will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (t sdu ? 135 c typical). once the ic temperature falls below the 135 c the ldo is turned?on again. the thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. reverse current the pmos pass transistor has an inherent body diode which will conduct the current in case that the v out > v in . such condition could exist in the case of pulling the v in voltage to ground. then the output capacitor voltage will be partially dischar ged through the pmos body diode. it have been verified that the device will not be damaged if the output capacitance is less than 22 f. if however larger output capacitors are used or extended reverse current
ncp700c http://onsemi.com 12 condition is anticipated the device may require additional external protection against the excessive reverse current. output noise if we neglect the noise coming from the (in) input pin of the ldo, the main contributor of noise present on the output pin (out) is the internal bandgap reference. this is because any noise which is generated at this node will be subsequently amplified through the error amplifier and the pmos pass device. access to the bandgap reference node is supplied through the byp pin. for the 1.8 v output voltage option noise can be reduced from a typical value of 15 vrms by using 10 nf to less than 10 vrms by using a 100 nf from the byp pin to ground. minimum load current ncp700c does not require any minimum load current for stability. the minimum load current is assured by the internal circuitry. power dissipation for given ambient temperature t a and thermal resistance r ja the maximum device power dissipation can be calculated by: p d(max) 125 t a ja (eq. 2) for reliable operation junction temperature should be limited to +125 c. load regulation the ncp700c features very good load regulation of 5 mv max. in 0 ma to 200 ma range. in order to achieve this very good load regulation a special attention to pcb design is necessary. the trace resistance from the out pin to the point of load can easily approach 100 m which will cause 20 mv voltage drop at full load current, deteriorating the excellent load regulation. power supply rejection ratio the ncp700c features excellent power supply rejection ratio. the psrr can be tuned by selecting proper c noise and c out capacitors. in the frequency range from 10 hz up to about 10 khz the larger noise bypass capacitor c noise will help to improve the psrr. at the frequencies above 10 khz the addition of higher c out output capacitor will result in improved psrr. pcb layout recommendations connect the input (c in ), output (c out ) and noise bypass capacitors (c noise ) as close as possible to the device pins. the c noise capacitor is connected to high impedance byp pin and thus the length of the trace between the capacitor and the pin should be as small as possible to avoid noise pickup. in order to minimize the solution size use 0402 or 0603 capacitors. to obtain small transient variations and good regulation characteristics place c in and c out capacitors close to the device pins and make the pcb traces wide. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated by the formula: p d v in v out i out v in i gnd (eq. 3) line regulation the ncp700c features very good line regulation of 0.6mv/v (typ). furthermore the detailed output v oltage vs. input voltage characteristics show that up to v in = 5 v the output voltage deviation is typically less than 250 v for 1.8 v output voltage option and less than 150 v for higher output voltage options. above the v in = 5 v the output voltage falls rapidly which leads to the typical 0.6 mv/v. ordering information device nominal output voltage marking package shipping ? NCP700CMT45TBG 4.5 v t wdfn6 (pb?free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp700c http://onsemi.com 13 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d e 0.10 c a3 a a1 2x 2x 0.10 c wdfn6 1.5x1.5, 0.5p case 511bj issue b dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d e e l pin one reference 0.05 c 0.05 c a 0.10 c note 3 l2 e b b 3 6 6x 1 4 0.05 c mounting footprint* l1 1.50 bsc 1.50 bsc 0.50 bsc 0.40 0.60 --- 0.15 bottom view l 5x dimensions: millimeters 0.73 6x 0.35 5x 1.80 0.50 pitch *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. l1 detail a l alternate terminal constructions ??? l2 0.50 0.70 top view b side view note 4 recommended 0.83 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncp700c/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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